cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 1/8 MTA090N02KC3 cystek product specification 20v n-channel enhancement mode mosfet MTA090N02KC3 bv dss 20v i d @v gs =4v, t a =25 c 1.4a r dson @v gs =4v, i d =1a 63m (typ) r dson @v gs =2.5v,i d =1a 83m (typ) features r dson @v gs =1.8v,i d =500ma 160m (typ) ? simple drive requirement ? small package outline ? pb-free lead plating and halogen-free package symbol outline ordering information device package shipping MTA090N02KC3-0-t1-g sot-523 (pb-free lead plating package) 3000 pcs / tape & reel MTA090N02KC3 sot-523 d g gate s source d drain s g environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel, 7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 2/8 MTA090N02KC3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 20 gate-source voltage v gs 8 v continuous drain current @ t a =25 c, v gs =4v 1.4 (note 3) continuous drain current @ t a =70 c, v gs =4v i d 1.1 (note 3) pulsed drain current (notes 1, 2) i dm 6.0 a power dissipation p d 280 (note 3) mw esd susceptibility v esd 1200 (note 4) v operating junction and storage temperature tj, tstg -55~+150 c thermal performance parameter symbol limit unit thermal resistance, junction-to-ambient, max (note 3) r ? ja 450 thermal resistance, junction-to-case, max r ? jc 312 c/w note : 1. pulse width limited by maximum junction temperature. 2. pulse width 300 s, duty cycle 2%. 3. surface mounted on 1 in2 copper pad of fr-4 board. 4. human body model, 1.5k in series with 100pf. electrical characteristics (tj=25 c, unless otherwise noted) symbol min. typ. max. unit test conditions static bv dss 20 - - v gs =0v, i d =250 a v gs(th) 0.3 - 1.0 v v ds =v gs , i d =250 a i gss - - 2 10 v gs = 2 8v, v ds =0v - - 1 v ds =20v, v gs =0v i dss - - 10 a v ds =16v, v gs =0v (tj=70 c) - 63 100 v gs =4v, i d =1a - 83 120 v gs =2.5v, i d =1a *r ds(on) - 160 250 m v gs =1.8v, i d =500ma *g fs - 3.8 - s v ds =3v, i d =1a dynamic ciss - 159 - coss - 26 - crss - 27 - pf v ds =15v, v gs =0, f=1mhz t d(on) - 4.4 - t r - 17.8 - t d(off) - 14.8 - t f - 17 - ns v ds =10v, i d =200ma, v gs =4.5v, r g =10 qg - 2.6 - qgs - 0.56 - qgd - 0.4 - nc v ds =10v, i d =200ma, v gs =4.5v
cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 3/8 MTA090N02KC3 cystek product specification source-drain diode *v sd - 0.84 1.2 v v gs =0v, i s =1a *trr - 4.6 - ns *qrr - 1.0 - nc i f =0.2a, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% typical characteristics typical output characteristics 0 1 2 3 4 5 6 00 . 511 . 5 2 10 v, 9v, 8v, 7v, 6v, 5v, 4v, 3v v ds , drain-source voltage(v) i d , drain current (a) v gs =2v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 0 200 400 600 800 0.01 0.1 1 10 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =1.8v v gs =2v v gs =2.5v v gs =3v v gs =4v v gs =1.5v reverse drain current vs source-drain voltage 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 i dr , reverse drain current (a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v
cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 4/8 MTA090N02KC3 cystek product specification typical characteristics(cont.) static drain-source on-state resistance vs gate-source voltage 0 100 200 300 400 500 600 700 800 012345678 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =1a drain-source on-state resistance vs junction tempearture 0.6 0.8 1 1.2 1.4 1.6 1.8 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =4v, i d =1a r ds( on) @tj=25c : 63m typ. v gs =2.5v, i d =1a r ds( on) @tj=25c : 83m typ. capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma single pulse power rating, junction to ambient (note on page 2) 0 1 2 3 4 5 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =450c/w forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =3v
cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 5/8 MTA090N02KC3 cystek product specification typical characteristics(cont.) maximum safe operating area 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c, v gs =4v, r ja =450c/w single pulse r ds( on) limited maximum drain current vs junctiontemperature 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =4v, r ja =450c/w gate charge characteristics 0 2 4 6 8 10 0123456 qg, total gate charge(nc) v gs , gate-source voltage(v) v ds =10v i d =200ma typical transfer characteristics 0 1 2 3 4 5 6 012345 v gs , gate-source voltage(v) i d , drain current (a) v ds =3v t a =25c transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *z ja (t) 4.r ja =450 c/w
cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 6/8 MTA090N02KC3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 7/8 MTA090N02KC3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c983c3 issued date : 2014.11.19 revised date : page no. : 8/8 MTA090N02KC3 cystek product specification sot-523 dimension *: typical marking: inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.0079 0.0157 0.20 0.40 i *0.0197 - *0.50 - b 0.0591 0.0669 1.50 1.70 j 0.0610 0.0650 1.55 1.65 c 0.0118 0.0197 0.30 0.50 k 0.0276 0.0315 0.70 0.80 d 0.0295 0.0335 0.75 0.85 l 0.0224 0.0248 0.57 0.63 e 0.0118 0.0197 0.30 0.50 m 0.0020 0.0059 0.05 0.15 f 0.0039 0.0118 0.10 0.30 n 0.0039 0.0118 0.10 0.30 g 0.0039 0.0118 0.10 0.30 o 0 0.0031 0 0.08 h *0.0197 - *0.50 - notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . n h f 12 3 j a b c d e g i k l m o style: pin 1.gate 2.source 3.drain 3-lead sot-523 plastic surface mounted package cystek package code: c3 hn xx date code device code
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